Widespread use of computers and other electronic devices has fueled the growth of printed circuit board (PCB) production. Like others who fabricate mass-produced items, PCB manufacturers continually seek to lower production costs while increasing the functionality, quality and reliability of their products.
Before a PCB design is manufactured, an assembler will often compose a complete layout drawing of the PCB that includes items such as electronic components or the location of traces on tbe board. Often a PCB assembler must gather this assembly information from many sources. For example, the board traces may be located on an image file residing in one database while the microchip package type images reside in a second database. In addition, the assembly information may be created using different software packages, such as Gerber or CAD. Thus, in order to create a layout drawing, the PCB assembler must first locate all of the image files and then translate the image files from their software-specific platforms to a neutral file format. Not only is this translating step time consuming, but often the translations themselves are error-prone. The PCB assembler cannot rely on the accuracy of the data he receives once translated.
Because of the disadvantages of the prior art, it is apparent that a new method to compile information from image and data files created on differing software platforms is needed. This new method should adequately gather all of the information the PCB assembler requires to create a PCB layout drawing. The new method should also improve the accuracy of the data the assembler receives and should reduce the amount of time needed to gather the assembly data, thereby reducing overall manufacturing costs. The present invention is directed to meeting those ends.